---
title: 'In the News: November 2, 2026 (Morning)'
description: "A maintainer's ten-trial test reports an agent fixing a RISC-V bug in 21 minutes instead of 56 once waveforms were queryable and job waits returned on completion."
canonical_url: 'https://darkfactory.dev/news/2026-11-02-morning'
markdown_url: 'https://darkfactory.dev/news/2026-11-02-morning.md'
collection: news
date_published: '2026-11-02T07:20:00-05:00'
date_modified: '2026-11-02T07:20:00-05:00'
---

# In the News: November 2, 2026 (Morning)


One story this morning: a hardware-debugging experiment that attributes most of an agent's lost time to waiting and to missing visibility, not to finding the bug.

## 1. An agent spent most of its debugging time asleep or blind, not looking for the bug

**[Why AI agents struggle with RTL debugging, and what helps](https://booley.dev/blog/harness-matters/)** · boldaxolotl, maintainer of Booley · Booley application note, October 16, 2026

The author ran the same coding agent (Claude Code) on one bug in the RISC-V core inside Caliptra, a hardware root of trust, ten times in each of two setups. The bug was a historical one in the VeeR EL2 processor, reintroduced by reverting an upstream fix. The agent was to fix it and add a test that fails before the fix and passes after. Both setups succeeded in all ten trials. Mean time was 55.8 minutes with a plain shell and 21.3 minutes with Booley, the author's open-source harness for FPGA and ASIC work; medians were 53.3 and 21.4. Mean cost per trial was $2.33 and $1.98.

The author reports that the agent usually located the faulty line within five minutes in both setups. The time went elsewhere. In the plain-shell runs, the agent added debug prints and recompiled to see internal signals, and it slept on background jobs that had already finished. In one trial a build failed one second after it started, but the command ended with `; tail` and reported exit code 0. The agent then requested a 540-second sleep. Across that run it spent 30.7 of 60 minutes asleep after jobs had finished. The author puts the average savings at 9.4 minutes on signal observation and 11.2 minutes on waiting on finished jobs, with waits affecting six of ten pairs, and 3.6 minutes on build setup. The three changes were a tool for searching recorded waveforms, a simulation command that blocks until the job ends, and build configuration kept in files.

The author builds Booley and ran the experiment, and says so. The post describes the test as "a case study, not a benchmark": one bug, one design, one model. It also says the contribution of each fix was not isolated. We have not rerun it.

**Why it matters:** Two of the three problems are not about chips. An agent that polls with fixed sleeps, or that runs a build whose failure is hidden behind a pipe, loses time in any slow verification loop. If your factory runs long jobs, return results when the job ends, keep the exit code visible, and put build configuration in files every run reads. The author notes that one line in `CLAUDE.md` telling the agent to wait for the process would "likely recover much of this time", though that is the author's estimate and was not tested.
